RegisterBlock

s32k142_pac::mscm

Struct RegisterBlock 

#[repr(C)]
pub struct RegisterBlock {
Show 20 fields
    cpx_type: CpxType,
    cpx_num: CpxNum,
    cpx_master: CpxMaster,
    cpx_count: CpxCount,
    cpx_cfg0: CpxCfg0,
    cpx_cfg1: CpxCfg1,
    cpx_cfg2: CpxCfg2,
    cpx_cfg3: CpxCfg3,
    cp0type: Cp0type,
    cp0num: Cp0num,
    cp0master: Cp0master,
    cp0count: Cp0count,
    cp0cfg0: Cp0cfg0,
    cp0cfg1: Cp0cfg1,
    cp0cfg2: Cp0cfg2,
    cp0cfg3: Cp0cfg3,
    _reserved16: [u8; 960],
    ocmdr0: Ocmdr0,
    ocmdr1: Ocmdr1,
    ocmdr2: Ocmdr2,

}
Expand description

Register block

Fields§

§cpx_type: CpxType§cpx_num: CpxNum§cpx_master: CpxMaster§cpx_count: CpxCount§cpx_cfg0: CpxCfg0§cpx_cfg1: CpxCfg1§cpx_cfg2: CpxCfg2§cpx_cfg3: CpxCfg3§cp0type: Cp0type§cp0num: Cp0num§cp0master: Cp0master§cp0count: Cp0count§cp0cfg0: Cp0cfg0§cp0cfg1: Cp0cfg1§cp0cfg2: Cp0cfg2§cp0cfg3: Cp0cfg3§_reserved16: [u8; 960]§ocmdr0: Ocmdr0§ocmdr1: Ocmdr1§ocmdr2: Ocmdr2

Implementations§

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impl RegisterBlock

pub const fn cpx_type(&self) -> &CpxType

0x00 - Processor X Type Register

pub const fn cpx_num(&self) -> &CpxNum

0x04 - Processor X Number Register

pub const fn cpx_master(&self) -> &CpxMaster

0x08 - Processor X Master Register

pub const fn cpx_count(&self) -> &CpxCount

0x0c - Processor X Count Register

pub const fn cpx_cfg0(&self) -> &CpxCfg0

0x10 - Processor X Configuration Register 0

pub const fn cpx_cfg1(&self) -> &CpxCfg1

0x14 - Processor X Configuration Register 1

pub const fn cpx_cfg2(&self) -> &CpxCfg2

0x18 - Processor X Configuration Register 2

pub const fn cpx_cfg3(&self) -> &CpxCfg3

0x1c - Processor X Configuration Register 3

pub const fn cp0type(&self) -> &Cp0type

0x20 - Processor 0 Type Register

pub const fn cp0num(&self) -> &Cp0num

0x24 - Processor 0 Number Register

pub const fn cp0master(&self) -> &Cp0master

0x28 - Processor 0 Master Register

pub const fn cp0count(&self) -> &Cp0count

0x2c - Processor 0 Count Register

pub const fn cp0cfg0(&self) -> &Cp0cfg0

0x30 - Processor 0 Configuration Register 0

pub const fn cp0cfg1(&self) -> &Cp0cfg1

0x34 - Processor 0 Configuration Register 1

pub const fn cp0cfg2(&self) -> &Cp0cfg2

0x38 - Processor 0 Configuration Register 2

pub const fn cp0cfg3(&self) -> &Cp0cfg3

0x3c - Processor 0 Configuration Register 3

pub const fn ocmdr0(&self) -> &Ocmdr0

0x400 - On-Chip Memory Descriptor Register

pub const fn ocmdr1(&self) -> &Ocmdr1

0x404 - On-Chip Memory Descriptor Register

pub const fn ocmdr2(&self) -> &Ocmdr2

0x408 - On-Chip Memory Descriptor Register

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