Type Alias W 

pub type W = W<SynconfSpec>;

Register SYNCONF writer

Aliased Type

pub struct W { /* private fields */ }

Implementations

impl W

pub fn hwtrigmode(&mut self) -> HwtrigmodeW<'_, SynconfSpec>

Bit 0 - Hardware Trigger Mode

pub fn cntinc(&mut self) -> CntincW<'_, SynconfSpec>

Bit 2 - CNTIN Register Synchronization

pub fn invc(&mut self) -> InvcW<'_, SynconfSpec>

Bit 4 - INVCTRL Register Synchronization

pub fn swoc(&mut self) -> SwocW<'_, SynconfSpec>

Bit 5 - SWOCTRL Register Synchronization

pub fn syncmode(&mut self) -> SyncmodeW<'_, SynconfSpec>

Bit 7 - Synchronization Mode

pub fn swrstcnt(&mut self) -> SwrstcntW<'_, SynconfSpec>

Bit 8 - FTM counter synchronization is activated by the software trigger

pub fn swwrbuf(&mut self) -> SwwrbufW<'_, SynconfSpec>

Bit 9 - MOD, HCR, CNTIN, and CV registers synchronization is activated by the software trigger

pub fn swom(&mut self) -> SwomW<'_, SynconfSpec>

Bit 10 - Output mask synchronization is activated by the software trigger

pub fn swinvc(&mut self) -> SwinvcW<'_, SynconfSpec>

Bit 11 - Inverting control synchronization is activated by the software trigger

pub fn swsoc(&mut self) -> SwsocW<'_, SynconfSpec>

Bit 12 - Software output control synchronization is activated by the software trigger

pub fn hwrstcnt(&mut self) -> HwrstcntW<'_, SynconfSpec>

Bit 16 - FTM counter synchronization is activated by a hardware trigger

pub fn hwwrbuf(&mut self) -> HwwrbufW<'_, SynconfSpec>

Bit 17 - MOD, HCR, CNTIN, and CV registers synchronization is activated by a hardware trigger

pub fn hwom(&mut self) -> HwomW<'_, SynconfSpec>

Bit 18 - Output mask synchronization is activated by a hardware trigger

pub fn hwinvc(&mut self) -> HwinvcW<'_, SynconfSpec>

Bit 19 - Inverting control synchronization is activated by a hardware trigger

pub fn hwsoc(&mut self) -> HwsocW<'_, SynconfSpec>

Bit 20 - Software output control synchronization is activated by a hardware trigger