Type Alias BiasenW 

pub type BiasenW<'a, REG> = BitWriter<'a, REG, Biasen>;

Field BIASEN writer - Bias Enable Bit

Aliased Type

pub struct BiasenW<'a, REG> { /* private fields */ }

Implementations

impl<'a, REG> BiasenW<'a, REG>

where REG: Writable + RegisterSpec,

pub fn _0(self) -> &'a mut W<REG>

Biasing disabled, core logic can run in full performance

pub fn _1(self) -> &'a mut W<REG>

Biasing enabled, core logic is slower and there are restrictions in allowed system clock speed (see Data Sheet for details)