Module lmpecr 

LMEM Parity and ECC Control Register

Structs

LmpecrSpec

LMEM Parity and ECC Control Register

Enums

Ecpr

Enable Cache Parity Reporting

Er1br

Enable RAM ECC 1 Bit Reporting This bit field is Reserved and Read-Only 0 for S32K11x variants. This bit field cannot mask ECC reporting, as a result the ECC would always be reported.

Erncr

Enable RAM ECC Noncorrectable Reporting This bit field is Reserved and Read-Only 0 for S32K11x variants. This bit field cannot mask ECC reporting, as a result the ECC would always be reported.

Type Aliases

EcprR

Field ECPR reader - Enable Cache Parity Reporting

EcprW

Field ECPR writer - Enable Cache Parity Reporting

Er1brR

Field ER1BR reader - Enable RAM ECC 1 Bit Reporting This bit field is Reserved and Read-Only 0 for S32K11x variants. This bit field cannot mask ECC reporting, as a result the ECC would always be reported.

Er1brW

Field ER1BR writer - Enable RAM ECC 1 Bit Reporting This bit field is Reserved and Read-Only 0 for S32K11x variants. This bit field cannot mask ECC reporting, as a result the ECC would always be reported.

ErncrR

Field ERNCR reader - Enable RAM ECC Noncorrectable Reporting This bit field is Reserved and Read-Only 0 for S32K11x variants. This bit field cannot mask ECC reporting, as a result the ECC would always be reported.

ErncrW

Field ERNCR writer - Enable RAM ECC Noncorrectable Reporting This bit field is Reserved and Read-Only 0 for S32K11x variants. This bit field cannot mask ECC reporting, as a result the ECC would always be reported.

R

Register LMPECR reader

W

Register LMPECR writer