Module lpspi0 

The LPSPI Memory Map/Register Definition can be found here.

Modules

ccr

Clock Configuration Register

cfgr0

Configuration Register 0

cfgr1

Configuration Register 1

cr

Control Register

der

DMA Enable Register

dmr0

Data Match Register 0

dmr1

Data Match Register 1

fcr

FIFO Control Register

fsr

FIFO Status Register

ier

Interrupt Enable Register

param

Parameter Register

rdr

Receive Data Register

rsr

Receive Status Register

sr

Status Register

tcr

Transmit Command Register

tdr

Transmit Data Register

verid

Version ID Register

Structs

RegisterBlock

Register block

Type Aliases

Ccr

CCR (rw) register accessor: Clock Configuration Register

Cfgr0

CFGR0 (rw) register accessor: Configuration Register 0

Cfgr1

CFGR1 (rw) register accessor: Configuration Register 1

Cr

CR (rw) register accessor: Control Register

Der

DER (rw) register accessor: DMA Enable Register

Dmr0

DMR0 (rw) register accessor: Data Match Register 0

Dmr1

DMR1 (rw) register accessor: Data Match Register 1

Fcr

FCR (rw) register accessor: FIFO Control Register

Fsr

FSR (r) register accessor: FIFO Status Register

Ier

IER (rw) register accessor: Interrupt Enable Register

Param

PARAM (r) register accessor: Parameter Register

Rdr

RDR (r) register accessor: Receive Data Register

Rsr

RSR (r) register accessor: Receive Status Register

Sr

SR (rw) register accessor: Status Register

Tcr

TCR (rw) register accessor: Transmit Command Register

Tdr

TDR (w) register accessor: Transmit Data Register

Verid

VERID (r) register accessor: Version ID Register