Module lmem_pcccr 

Cache control register

Structs

LmemPcccrSpec

Cache control register

Enums

Encache

Cache enable

Go

Initiate Cache Command

Invw0

Invalidate Way 0

Invw1

Invalidate Way 1

Pushw0

Push Way 0

Pushw1

Push Way 1

Type Aliases

EncacheR

Field ENCACHE reader - Cache enable

EncacheW

Field ENCACHE writer - Cache enable

GoR

Field GO reader - Initiate Cache Command

GoW

Field GO writer - Initiate Cache Command

Invw0R

Field INVW0 reader - Invalidate Way 0

Invw0W

Field INVW0 writer - Invalidate Way 0

Invw1R

Field INVW1 reader - Invalidate Way 1

Invw1W

Field INVW1 writer - Invalidate Way 1

Pccr2R

Field PCCR2 reader - Forces all cacheable spaces to write through

Pccr2W

Field PCCR2 writer - Forces all cacheable spaces to write through

Pccr3R

Field PCCR3 reader - Forces no allocation on cache misses (must also have PCCR2 asserted)

Pccr3W

Field PCCR3 writer - Forces no allocation on cache misses (must also have PCCR2 asserted)

Pushw0R

Field PUSHW0 reader - Push Way 0

Pushw0W

Field PUSHW0 writer - Push Way 0

Pushw1R

Field PUSHW1 reader - Push Way 1

Pushw1W

Field PUSHW1 writer - Push Way 1

R

Register LMEM_PCCCR reader

W

Register LMEM_PCCCR writer