Module flexio 

The FLEXIO Memory Map/Register Definition can be found here.

Modules

ctrl

FlexIO Control Register

param

Parameter Register

pin

Pin State Register

shiftbuf

Shifter Buffer N Register

shiftbufbbs

Shifter Buffer N Bit Byte Swapped Register

shiftbufbis

Shifter Buffer N Bit Swapped Register

shiftbufbys

Shifter Buffer N Byte Swapped Register

shiftcfg

Shifter Configuration N Register

shiftctl

Shifter Control N Register

shifteien

Shifter Error Interrupt Enable

shifterr

Shifter Error Register

shiftsden

Shifter Status DMA Enable

shiftsien

Shifter Status Interrupt Enable

shiftstat

Shifter Status Register

timcfg

Timer Configuration N Register

timcmp

Timer Compare N Register

timctl

Timer Control N Register

timien

Timer Interrupt Enable Register

timstat

Timer Status Register

verid

Version ID Register

Structs

RegisterBlock

Register block

Type Aliases

Ctrl

CTRL (rw) register accessor: FlexIO Control Register

Param

PARAM (r) register accessor: Parameter Register

Pin

PIN (r) register accessor: Pin State Register

Shiftbuf

SHIFTBUF (rw) register accessor: Shifter Buffer N Register

Shiftbufbbs

SHIFTBUFBBS (rw) register accessor: Shifter Buffer N Bit Byte Swapped Register

Shiftbufbis

SHIFTBUFBIS (rw) register accessor: Shifter Buffer N Bit Swapped Register

Shiftbufbys

SHIFTBUFBYS (rw) register accessor: Shifter Buffer N Byte Swapped Register

Shiftcfg

SHIFTCFG (rw) register accessor: Shifter Configuration N Register

Shiftctl

SHIFTCTL (rw) register accessor: Shifter Control N Register

Shifteien

SHIFTEIEN (rw) register accessor: Shifter Error Interrupt Enable

Shifterr

SHIFTERR (rw) register accessor: Shifter Error Register

Shiftsden

SHIFTSDEN (rw) register accessor: Shifter Status DMA Enable

Shiftsien

SHIFTSIEN (rw) register accessor: Shifter Status Interrupt Enable

Shiftstat

SHIFTSTAT (rw) register accessor: Shifter Status Register

Timcfg

TIMCFG (rw) register accessor: Timer Configuration N Register

Timcmp

TIMCMP (rw) register accessor: Timer Compare N Register

Timctl

TIMCTL (rw) register accessor: Timer Control N Register

Timien

TIMIEN (rw) register accessor: Timer Interrupt Enable Register

Timstat

TIMSTAT (rw) register accessor: Timer Status Register

Verid

VERID (r) register accessor: Version ID Register